1 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com WS256K32-XXX hi-reliability product 256kx32 sram module preliminary* features n access times 20, 25, 35ns n mil-std-883 compliant devices available n packaging ? 66 pin, pga type, 1.185 inch square, hermetic ceramic hip (package 401) ? 68 lead, 40mm, hermetic cqfp (package 501) n organized as 256kx32, user configurable as 512kx16 n upgradable to 512kx32 for future expansion n data i/o compatible with 3.3v devices n 2v data retention devices available (ws256k32l-xxx low power version only) n commercial, industrial and military temperature range n 5 volt power supply n low power cmos n ttl compatible inputs and outputs n weight ws256k32n-xhx - 13 grams typical ws256k32-xg4x - 20 grams typical * this data sheet describes a product under development, not fully characterized, and is subject to change without notice. fig. 1 pin configuration for ws256k32n-xhx i/o 8 i/o 9 i/o 10 a 13 a 14 a 15 a 16 a 17 i/o 0 i/o 1 i/o 2 nc nc gnd i/o 11 a 10 a 11 a 12 v cc cs 1 nc i/o 3 i/o 15 i/o 14 i/o 13 i/o 12 oe nc we 1 i/o 7 i/o 6 i/o 5 i/o 4 i/o 24 i/o 25 i/o 26 a 6 a 7 nc a 8 a 9 i/o 16 i/o 17 i/o 18 v cc nc nc i/o 27 a 3 a 4 a 5 we 2 cs 2 gnd i/o 19 i/o 31 i/o 30 i/o 29 i/o 28 a 0 a 1 a 2 i/o 23 i/o 22 i/o 21 i/o 20 11 22 33 44 55 66 1 12 23 34 45 56 block diagram top view pin description i/o 0 - 31 data inputs/outputs a 0-17 address inputs we 1-2 write enables cs 1-2 chip selects oe output enable v cc power supply gnd ground nc not connected 256k x 16 16 i/o 0-15 cs 1 256k x 16 16 i/o 16-31 2 a 0-17 oe we cs we 12 october 2000 rev. 2
2 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com WS256K32-XXX top view 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 60 59 58 57 56 55 54 53 52 51 50 49 48 47 46 45 44 9 8 7 6 5 4 3 2 1 68 67 66 65 64 63 62 61 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 i/o 0 i/o 1 i/o 2 i/o 3 i/o 4 i/o 5 i/o 6 i/o 7 gnd i/o 8 i/o 9 i/o 10 i/o 11 i/o 12 i/o 13 i/o 14 i/o 15 v cc a 11 a 12 a 13 a 14 a 15 a 16 nc oe nc a 17 nc nc nc nc nc nc i/o 16 i/o 17 i/o 18 i/o 19 i/o 20 i/o 21 i/o 22 i/o 23 gnd i/o 24 i/o 25 i/o 26 i/o 27 i/o 28 i/o 29 i/o 30 i/o 31 nc a 0 a 1 a 2 a 3 a 4 a 5 cs 1 gnd cs 2 we a 6 a 7 a 8 a 9 a 10 v cc fig. 2 pin configuration for ws256k32-xg4x pin description i/o 0 - 31 data inputs/outputs a 0-17 address inputs we write enable cs 1-2 chip selects oe output enable v cc power supply gnd ground nc not connected block diagram 256k x 16 16 i/o 0-15 cs 1 256k x 16 16 i/o 16-31 cs 2 a 0 - 17 oe we
3 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com WS256K32-XXX parameter symbol min max unit operating temperature t a -55 +125 c storage temperature t stg -65 +150 c signal voltage relative to gnd v g -0.5 vcc+0.5 v junction temperature t j 150 c supply voltage v cc -0.5 7.0 v truth table recommended operating conditions absolute maximum ratings parameter symbol min max unit supply voltage v cc 4.5 5.5 v input high voltage v ih 2.2 v cc + 0.3 v input low voltage v il -0.5 +0.8 v operating temp (mil) t a -55 +125 c cs oe we mode data i/o power h x x standby high z standby l l h read data out active l h h out disable high z active l x l write data in active capacitance (t a = +25 c) parameter symbol conditions max unit oe capacitance c oe v in = 0 v, f = 1.0 mhz 28 pf we 1-2 capacitance c we v in = 0 v, f = 1.0 mhz pf hip (pga) 20 cqfp g4 28 cs 1-2 capacitance c cs v in = 0 v, f = 1.0 mhz 20 pf data i/o capacitance c i/o v i/o = 0 v, f = 1.0 mhz 20 pf address input capacitance c ad v in = 0 v, f = 1.0 mhz 28 pf this parameter is guaranteed by design but not tested. parameter symbol conditions units min max input leakage current i li v cc = 5.5, v in = gnd to v cc 10 m a output leakage current i lo cs = v ih , oe = v ih , v out = gnd to v cc 10 m a operating supply current x 32 mode i cc x 32 cs = v il , oe = v ih , f = 5mhz, vcc = 5.5 550 ma standby current i sb cs = v ih , oe = v ih , f = 5mhz, vcc = 5.5 34 ma output low voltage v ol i ol = 8ma, vcc = 4.5 0.4 v output high voltage v oh i oh = -4.0ma, vcc = 4.5 2.4 v note: dc test conditions: v ih = v cc -0.3v, v il = 0.3v dc characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) low power data retention characteristics (ws256k32l-xxx only) (t a = -55 c to +125 c) parameter symbol conditions units min typ max data retention supply voltage v dr cs 3 v cc -0.2v 2.0 5.5 v data retention current i ccdr3 v cc = 3v 1.0 16 ma
4 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com WS256K32-XXX ac characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter symbol -20 -25 -35 units read cycle min max min max min max read cycle time t rc 20 25 35 ns address access time t aa 20 25 35 ns output hold from address change t oh 000 ns chip select access time t acs 20 25 35 ns output enable to output valid t oe 12 15 20 ns chip select to output in low z t clz 1 555 ns output enable to output in low z t olz 1 000 ns chip disable to output in high z t chz 1 12 15 20 ns output disable to output in high z t ohz 1 12 15 20 ns 1. this parameter is guaranteed by design but not tested. i current source d.u.t. c = 50 pf eff i ol v 1.5v (bipolar supply) z current source oh notes: v z is programmable from -2v to +7v. i ol & i oh programmable from 0 to 16ma. tester impedance z 0 = 75 w . v z is typically the midpoint of v oh and v ol . i ol & i oh are adjusted to simulate a typical resistive load circuit. ate tester includes jig capacitance. fig. 3 ac test circuit ac test conditions parameter typ unit input pulse levels v il = 0, v ih = 3.0 v input rise and fall 5 ns input and output reference level 1.5 v output timing reference level 1.5 v ac characteristics (v cc = 5.0v, gnd = 0v, t a = -55 c to +125 c) parameter symbol -20 -25 -35 units write cycle min max min max min max write cycle time t wc 20 25 35 ns chip select to end of write t cw 17 20 25 ns address valid to end of write t aw 17 20 25 ns data valid to end of write t dw 12 15 20 ns write pulse width t wp 17 20 25 ns address setup time t as 000ns address hold time t ah 222ns output active from end of write t ow 1 000ns write enable to output in high z t whz 1 81015ns data hold time t dh 000ns 1. this parameter is guaranteed by design but not tested.
5 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com WS256K32-XXX ws32k32-xhx fig. 4 timing waveform - read cycle fig. 6 write cycle - cs controlled fig. 5 write cycle - we controlled address data i/o write cycle 1, we controlled t aw t cw t ah t wp t dw t whz t as t ow t dh t wc data valid cs we address data i/o write cycle 2, cs controlled t aw t as t cw t ah t wp t dh t dw t wc cs we data valid address data i/o read cycle 2 (we = v ih ) t aa t acs t oe t clz t olz t ohz t rc data valid high impedance cs oe t chz address data i/o read cycle 1 (cs = oe = v il , we = v ih ) t aa t oh t rc data valid previous data valid
6 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com WS256K32-XXX package 401: 66 pin, pga type, ceramic hex-in-line package, hip (h) 30.1 (1.185) 0.38 (0.015) sq 25.4 (1.0) typ 15.24 (0.600) typ 0.76 (0.030) 0.1 (0.005) 6.22 (0.245) max 3.81 (0.150) 0.1 (0.005) 2.54 (0.100) typ 25.4 (1.0) typ 1.27 (0.050) 0.1 (0.005) 1.27 (0.050) typ dia 0.46 (0.018) 0.05 (0.002) dia pin 1 identifier square pad on bottom all linear dimensions are millimeters and parenthetically in inches package 501: 68 lead, ceramic quad flat pack, cqfp (g4) all linear dimensions are millimeters and parenthetically in inches 0.38 (0.015) 0.08 (0.003) 68 places 1.27 (0.050) typ 5.1 (0.200) max 39.6 (1.56) 0.38 (0.015) sq 38 (1.50) typ 4 places 5.1 (0.200) 0.25 (0.010) 4 places 12.7 (0.500) 0.5 (0.020) 4 places 0.25 (0.010) 0.05 (0.002) 1.27 (0.050) 0.1 (0.005) pin 1 identifier pin 1
7 white electronic designs corporation ? (602) 437-1520 ? www.whiteedc.com WS256K32-XXX lead finish: blank = gold plated leads a = solder dip leads device grade: m = military screened -55 c to +125 c i = industrial -40 c to +85 c c = commercial 0 c to +70 c package: h = ceramic hex-in-line package, hip (package 401) g4 = 40mm ceramic quad flat pack, cqfp (package 501) access time (ns) improvement mark n = no connect at pins 21, 28 and 39 in hip for upgrades blank = standard power l = low power data retention organization, 256kx32 user configurable as 512kx16 sram white electronic designs corp. ordering information w s 256k32 x - xxx x x x
|
